technical data kk74hc163a presettable counters high-performance silicon-gate cmos the kk 74hc163a is identical in pinout to the ls/als163. the devi ce i nput s are com p at i b l e wi t h st andard c m os out put s; wi t h pul l up resistors, they are com p a tible with ls/alsttl outputs. the kk 74hc163a is programmable 4-bit synchronous counter that feat ure paral l e l load, sy nchronous r e set , a c a rry out put for cascadi ng and count -enabl e cont rol s . the kk 74hc163a is binary counter with synchronous reset. ? outputs directly interf ace to cmos, nmos, and ttl ? operat i ng vol t a ge r a nge: 2.0 t o 6.0 v ? low input c u rrent : 1.0 a ? high noise im m unity characteristic of cmos devices ordering information kk 74hc163an plastic kk 74hc163ad soic t a = -55 t o 125 c for all packages logic diagram pin 16 =v cc pin 8 = gnd function table input s o u t put s r e s e t l o a d e n a b l e p enable t c l ock q 0 q 1 q 2 q 3 f u n c t i o n l x x x l l l l reset t o ?0? h l x x p0 p1 p2 p 3 p r e s e t data h h x l no change no count h h l x no change no count h h h h c ount u p c ount x x x x no change no count pin assignment x=don?t care p0,p1,p2,p3 = l ogi c l e vel of dat a i nput s rip p l e carry ou t = en ab le t ? q0 ? q1 ? q2 ? q3 1
kk74hc163a maximum ratings * sym b o l p a r a m e t e r valu e un i t v cc dc suppl y vol t a ge (referenced t o gnd) -0.5 t o +7.0 v v in dc input vol t a ge (referenced t o gnd) -1.5 t o v cc +1.5 v v out dc output voltage (referenced to gnd) -0.5 to v cc +0.5 v i in dc input c u rrent , per pi n 20 ma i out dc out put c u rrent , per pi n 25 ma i cc dc suppl y c u rrent , v cc and gnd pins 50 ma p d po wer dissip a tio n in still air, plastic dip+ soic package+ 750 500 mw tst g st orage tem p erat ure -65 t o +150 c t l lead tem p erat ure, 1 m m from c a se for 10 seconds (plastic dip or soic package) 260 c * m a xi m u m r a t i ngs are t hose val u es bey ond whi c h dam a ge t o t h e devi ce m a y occur. functional operation should be restricted to the reco m m e nded operating conditions. +derat i ng - pl ast i c dip: - 10 m w / c from 65 t o 125 c soic package: : - 7 m w / c from 65 t o 125 c recommended operating conditions sy m bol p a r a m e t e r m i n m a x uni t v cc dc suppl y vol t a ge (referenced t o gnd) 2.0 6.0 v v in , v out dc input vol t a ge, out put vol t a ge (referenced t o gnd) 0 v cc v t a operat i ng tem p erat ure, al l package ty pes -55 +125 c t r , t f input r i se and fal l ti m e (fi gure 1) v cc =2.0 v v cc =4.5 v v cc =6.0 v 0 0 0 1000 500 400 ns thi s devi ce cont ai ns prot ect i on ci rcui t r y t o guard agai ns t dam a ge due t o hi gh st at i c vol t a ges or el ect ri c fi el ds. however, precautions m u st be taken to avoid applications of any voltage highe r than m a xim u m rated voltages to this hi gh-i m pedance ci rcui t . for proper operat i on, v in and v out shoul d be const r ai ned t o t h e range gnd (v in or v out ) v cc . unused i nput s m u st al way s be t i e d t o an appropri a t e l ogi c vol t a ge l e vel (e.g., ei t h er gnd or v cc ). unused out put s m u st be l e ft open. 2
kk74hc163a dc electrical characteristics (voltages referenced to gnd) v cc guaranteed lim it sy m bol p a r a m e t e r test c ondi t i o n s v 25 c to -55 c 85 c 125 c un it v ih m i ni m u m hi gh- level input vol t a ge v out =0.1 v or v cc -0.1 v ? i out ? 20 a 2.0 4.5 6.0 1.5 3.15 4.2 1.5 3.15 4.2 1.5 3.15 4.2 v v il m a x i mu m l o w - level input vol t a ge v out =0.1 v or v cc -0.1 v ? i out ? 20 a 2.0 4.5 6.0 0.5 1.35 1.8 0.5 1.35 1.8 0.5 1.35 1.8 v v oh m i ni m u m hi gh- level out put vol t a ge v in =v ih or v il ? i out ? 20 a 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 v v in =v ih or v il ? i out ? 6.0 m a ? i out ? 7.8 m a 4.5 6.0 3.98 5.48 3.84 5.34 3.7 5.2 v ol m a x i mu m l o w - level out put vol t a ge v in =v ih or v il ? i out ? 20 a 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v v in =v ih or v il ? i out ? 6.0 m a ? i out ? 7.8 m a 4.5 6.0 0.26 0.26 0.33 0.33 0.4 0.4 i in m a xi m u m input leakage current v in =v cc or gnd 6.0 0.1 1.0 1.0 a i cc m a x i mu m q u i e s c e n t suppl y c u rrent (per package) v in =v cc or gnd i out =0 a 6.0 4 . 0 4 0 1 6 0 a 3
kk74hc163a ac electrical characteristics (c l =50pf,input t r =t f =6.0 ns) v cc guaranteed lim it sym b o l p a r a m e t e r v 25 c to -55 c 85 c 125 c unit f ma x m a xi m u m c l ock frequency (fi gures1,6) 2.0 4.5 6.0 6 30 35 5 24 28 4 20 24 mh z t plh m a xi m u m propagat i on del a y c l ock t o q 2.0 4.5 6.0 120 20 16 160 23 20 200 28 22 ns t phl (fi gures 1,6) 2.0 4.5 6.0 145 22 18 185 25 20 320 30 23 ns t plh m a xi m u m propagat i on del a y enabl e t t o r i ppl e carry out 2.0 4.5 6.0 110 16 14 150 18 15 190 20 17 ns t phl (fi gures 2,6) 2.0 4.5 6.0 135 18 15 175 20 16 210 22 20 ns t plh m a xi m u m propagat i on del a y c l ock t o r i ppl e 2.0 4.5 6.0 120 22 18 160 27 22 200 30 25 ns t phl c a rry out (fi gures 1,6) 2.0 4.5 6.0 145 22 20 185 28 24 220 35 28 ns t tlh , t thl m a xi m u m out put transi t i on ti m e , any out put , (fi gures 1 and 6) 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns c in m a xi m u m input c a paci t a nce - 10 10 10 pf power di ssi pat i on c a paci t a nce (per gat e ) typical @25 c,v cc =5.0 v c pd used t o det e rm i n e t h e no-l o ad dy nam i c power consum pt i on: p d =c pd v cc 2 f+i cc v cc 3 0 p f 4
kk74hc163a timing requirements (c l =50pf,input t r =t f =6.0 ns) v cc guaranteed lim it sym b o l p a r a m e t e r v 25 c to -55 c 85 c 125 c unit t su m i ni m u m set up ti m e , preset dat a input s t o c l ock (fi gure 4) 2.0 4.5 6.0 40 15 12 60 20 18 80 30 20 ns t su m i ni m u m set up ti m e , load t o c l ock (fi gure 4) 2.0 4.5 6.0 60 15 12 75 20 18 90 30 20 ns t su m i ni m u m set up ti m e , r e set t o c l ock (fi gure 3) 2.0 4.5 6.0 60 20 17 75 25 23 90 35 25 ns t su minim u m setup tim e , enable t or enable p to c l ock (fi gure 5) 2.0 4.5 6.0 80 20 17 95 25 23 110 35 25 ns t h m i ni m u m hol d ti m e , c l ock t o load or preset dat a input s (fi gure 4) 2.0 4.5 6.0 3 3 3 3 3 3 3 3 3 ns t h m i n i mu m h o l d t i me , c l o c k t o r e s e t (fi gure 3) 2.0 4.5 6.0 3 3 3 3 3 3 3 3 3 ns t h m i ni m u m hol d ti m e , c l ock t o enabl e t or enabl e p (fi gure 5) 2.0 4.5 6.0 3 3 3 3 3 3 3 3 3 ns t rec m i ni m u m r ecovery ti m e , load inact i v e t o c l ock (fi gure 4) 2.0 4.5 6.0 80 15 12 95 20 17 110 26 23 ns t w m i ni m u m pul s e w i dt h, c l ock (fi gure 1) 2.0 4.5 6.0 60 12 10 75 15 13 90 18 15 ns t w m i ni m u m pul s e w i dt h, r e set (fi gure 3) 2.0 4.5 6.0 60 12 10 75 15 13 90 18 15 ns t r, t f m a xi m u m input r i se and fal l ti m e s (fi gure 1) 2.0 4.5 6.0 1000 500 400 1000 500 400 1000 500 400 ns 5
kk74hc163a fi gure 1. sw i t chi n g waveforms fi gure 2. sw i t chi n g waveforms fi gure 3. sw i t chi n g waveforms fi gure 4. sw i t chi n g waveforms fi gure 5. sw i t chi n g waveforms figure 6. test circuit 6
kk74hc163a v cc =pi n 16 gnd=pin 8 the fl i p -fl ops shown i n t h e ci rcui t di agram s are toggl e-enabl e fl i p -fl ops. a toggl e-enabl e fl i p -fl op i s a com b i n at i on of a d fl i p -fl op and a t fl i p -fl op. w h en l o adi ng dat a from preset i nput s p0, p1, p2, and p3, t h e load si gnal i s used t o di sabl e t h e toggl e i nput (tn) of t h e fl i p -fl op. the l ogi c l e vel at t h e pn i nput i s t h en cl ocked t o t h e q out put of t h e fl i p -fl op on t h e next ri si ng edge of t h e cl ock. a l ogi c zero on t h e r e set devi ce i nput forces t h e i n t e rnal cl ock (c ) hi gh and reset s t h e q out put of t h e fl i p -fl op lo w. fi gure 7.e x panded l ogi c di agram 7
kk74hc163a seq u e n ce illu strated in wav e fo rm s: 1. r e set out put s t o zero. 2. preset to binary twelve. 3. c ount t o t h i r t een, fourt een, fi ft een, zero, one, and t w o. 4. inhi bi t . fi gure 8. t i mi ng di agram 8
kk74hc163a typical applications cascading note:w hen used in these cascaded confi gurat i ons t h e cl ock f ma x guarant eed l i m i t s m a y not ap p l y. actu al p e rfo rm an ce will d e p e n d o n n u m b e r o f stag es. th is lim itatio n is d u e to set up t i m es bet w een enabl e (port ) and cl ock. figure 9. n-bit synchronous counters figure 10. nibble ripple counter 9
kk74hc163a n s u f f i x p l as t i c di p (m s - 0 0 1 b b ) sy m b o l m i n m a x a 18. 67 19. 69 b 6. 1 7 . 1 1 c 5. 33 d 0. 36 0. 56 f 1. 14 1. 78 g h j 0 10 k 2. 92 3. 81 no t e s : l 7. 62 8. 26 1. d i m e n s i o n s ?a ?, ?b ? d o n o t i n cl u d e m o l d f l as h o r p r o t r u s i o n s . m 0. 2 0 . 3 6 m a x i m u m m o l d f l a s h o r p r o t r u s i o n s 0. 25 m m ( 0 . 010) p e r s i d e . n 0. 38 d su f f i x so i c (m s - 0 1 2 a c) sy m b o l m i n m a x a 9. 8 1 0 b 3. 8 4 c 1. 35 1. 75 d 0. 33 0. 51 f 0. 4 1 . 2 7 g h j 0 8 no t e s : k 0. 1 0 . 2 5 1. d i m e n s i o ns a a n d b d o no t i n c l ud e m o l d f l a s h o r p r ot r u s i on . m 0. 19 0. 25 2. m a x i m u m m o l d f l a s h o r p r o t r u s i o n 0. 15 m m ( 0 . 006) p e r s i d e p 5. 8 6 . 2 fo r a ; fo r b ? 0. 25 m m ( 0 . 010) p e r s i d e . r 0. 25 0. 5 5. 72 2. 54 7. 62 1. 27 d i me n s i o n , mm d i me n s i o n , mm a b h c k c m j f m p g d r x 4 5 se a t i n g pl an e 0 . 25 ( 0 . 010 ) m t -t - 1 16 8 9 l h m j a b f g d se a t i n g pl a n e n k 0. 2 5 ( 0 . 010) m t -t - c 1 16 8 9 10
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